Mastering mixed-signal IC design


Analog designers, digital IC designers/verification engineers, place & route engineers and project managers in Cambridge are invited to a free technical seminar presented by Cadence, which takes place at the offices of ARM Ltd on Tuesday 18th November.

Cadence is bringing its technology to its customers and is hosting a series of Technology on Tour days across the UK during November 2008.

Join us for a free seminar and explore the latest technology and integrated flows – new capabilities that will help you design higher-performance chips and systems, increase productivity, improve your yield, and speed up your time to market.

This year we will have a special focus on Mixed-Signal Design, from Verification to Implementation. We will study methodologies and solutions to efficiently design complex mixed-signal SoCs. Especially ICs with a lot of analogue and digital require a seamless “Mixed-Signal On Top” methodology.

• Over 80% of today’s SoCs are true mixed-signal with increased interaction between analogue and digital elements.
• In nanometer silicon processes, integrated analogue blocks often require digital calibration whilst digital high speed blocks can fail through analogue effects such as noise and jitter.
• The traditional “black box” approaches of “analogue on top” or “digital on top” physical implementation approaches lead to wasted chip area, power and performance.
• Digital verification methodologies have advanced significantly in the past few years, e.g SystemC, SystemVerilog, SVA, “e”, coverage driven verification, verification management - how can these be applied to mixed signal systems?
• What’s the best approach for modelling mixed signal blocks - Spice, VerilogAMS VHDL-AMS
or wreals?
• Understand the power of interoperability between Cadence’s Encounter and Virtuoso platforms for mixed signal chip floorplanning, placement, routing and automated ECOs.

Please visit for more information

18th Nov 2008
ARM Ltd, 110 Fulbourn Road, Cambridge, CB1 9NJ


09:00 - 09:30
Registration & Coffee
09:30 - 10:00
Industry Keynote
10:00 - 10:30
Mixed-Signal Design Challenges – Cadence holistic solution
10:30 - 11:00
Mixed-Signal Verification Overview
11:00 - 11:30
Demo: AMS Designer featuring AMS-SpectreTurbo
11:30 - 12:00
Using AMS Designer like a logic verification engineer
12:00 - 12:30
Demo: Command line verification flow
12:30 - 13:30
13:30 - 14:00
Implementation overview, presentation of the MSoT concept
14:00 - 14:30
Demo: MSoT – concurrent Analogue and Digital design
14:30 - 14:50
Mixed-Signal Routing
14:50 - 15:10
Demo: Mixed-Signal Routing (Virtuoso Space based Router)
15:10 - 15:30
Extraction and timing verification
15:30 - 15:50
Demo: Extraction and timing verification
15:50 - 16:00
Wrap-up and summary

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ARM is at the heart of the world’s most advanced digital products. Our technology enables the creation of new markets and transformation of industries and society.

Arm Ltd